Hybrid design of parallel signature analyzers
- 7 January 2003
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 354-360
- https://doi.org/10.1109/etc.1989.36263
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- Hybrid designs generating maximum-length sequencesIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1988
- Aliasing Errors in Signature in Analysis RegistersIEEE Design & Test of Computers, 1987