Integrated memory array processor: A prototype VLSI and a real-time vision system
- 30 December 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
The authors describe the architecture and performance of a real-time vision system (RVS) and its use of an integrated memory array processor (IMAP) prototype LSI. This LSI integrates eight 8 bit processors and a 144 Kbit SRAM on a single chip. The RVS was developed using 64 IMAP prototype LSIs connected in series in a 512 processor system configuration. A host workstation can access memory on the IMAP prototype LSIs directly through a random access port. RVS peformance is shown in real-time road image processing and in real-time face detection as well as in low level image processing algorithms, such as filtering, histograms, discrete cosine transform (DCT), and rotation. The RVS image processing is shown to be much faster than the video rate.Keywords
This publication has 6 references indexed in Scilit:
- Robust identification of human face using mosaic pattern and BPNPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- IMAP: INTEGRATED MEMORY ARRAY PROCESSORJournal of Circuits, Systems and Computers, 1992
- The CLIP7A image processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988
- The AIS-5000 parallel processorPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1988
- A 256K dual port memoryPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1985
- Design of a Massively Parallel ProcessorIEEE Transactions on Computers, 1980