VLSI Architecture for a one chip video median filter
- 23 March 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Real-time image processing in an application environment needs a set of low-cost implementations of various algorithms. This paper presents a one chip VLSI median filter based on a systolic processor and working at video rate. It includes its own memory and can be used without any image memory for on-line processing. The architectural choices have made it possible to design a small size chip with a high performance level.Keywords
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