Novel asymmetric gate-recess engineering for sub-millimeter-wave InP-based HEMTs
- 13 November 2002
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 3, 2159-2162 vol.3
- https://doi.org/10.1109/mwsym.2001.967342
Abstract
A self-aligned asymmetric gate-recess structure for ultra-high speed InGaAs-InAlAs high electron mobility transistors (HEMTs) is successfully fabricated. A 50 nm T-shaped-gate HEMT with a longer drain-side recess exhibits a much-improved maximum oscillation frequency (f/sub max/) of 503 GHz, while retaining a similarly high current-gain cutoff frequency (f/sub t/) of 307 GHz compared to that with a conventional symmetric recess structure. This result indicates reduced electric field between gate and drain while keeping a small source resistance (R/sub s/) in the developed asymmetrically recessed HEMT.Keywords
This publication has 3 references indexed in Scilit:
- High fT 50-nm-Gate InAlAs/InGaAs High Electron Mobility Transistors Lattice-Matched to InP SubstratesJapanese Journal of Applied Physics, 2000
- 30-nm-Gate InP-Based Lattice-Matched High Electron Mobility Transistors with 350 GHz Cutoff FrequencyJapanese Journal of Applied Physics, 1999
- 50-nm self-aligned-gate pseudomorphic AlInAs/GaInAs high electron mobility transistorsIEEE Transactions on Electron Devices, 1992