Algorithm-architecture mapping for custom DSP chips
- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1953-1956
- https://doi.org/10.1109/iscas.1988.15321
Abstract
In the design of custom VLSI chipsd for digital signal processing (DSP) applications, a good algorithm-architecture mapping is critical to achieve efficiency and high performance. It is shown how an efficient mapping can be derived not only by adapting an architecture to a given algorithm, but also by changing the algorithm's description in a systematic way. A tool under development to support the designer in this procedure is described. Its graphical interface allows a flexible description of the algorithm. The tool can be used on different hierarchy levels and is capable of working on a combination of levels (mixed levels) as well. Besides these algorithm transformations, it performs the simulation of algorithms and scheduling of DSP algorithms on parallel hardware architectures.Keywords
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