Stress effects of package parameters on 4 Mega DRAM with fractional factorial designed finite element analysis
- 13 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A finite-element analysis (FEA) of fractional factorial design, carried out to study the effect that package material and geometric design has on stresses and chip bending in a 4-Mb DRAM device, is discussed. Six material parameters (coefficient of thermal expansion (CTE), Poisson's ratio, and Young's modulus for the glue and molding compound) and five geometric parameters (die-pad, glue, chip, and polymide coating thicknesses and the exposed die pad length) were evaluated. All parameters were varied between realistic upper and lower limits. Twelve FEA models were designed and the calculations carried out. The effect of the various parameters on stress at points near the die edge was observed. The CTE and Young's modulus of the molding compound were found to have an overwhelming effect on stress on the die surface and the surrounding encapsulation. Chip thickness had a moderate effect. Polyimide coating thickness had a moderate effect only near the die edge. The effect of the molding compound's coefficient of thermal expansion and Young's modulus was expected. The surprising result was the small effect of the other seven parameters.Keywords
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