Internal State Assignments for Asynchronous Sequential Machines
- 1 August 1966
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electronic Computers
- Vol. EC-15 (4) , 551-560
- https://doi.org/10.1109/pgec.1966.264362
Abstract
The paper presents three procedures for coding the internal states of asynchronous sequential switching circuits. Resulting codes insure that the circuit will function according to flow table specifications independent of variations in transmission delays within the circuit. The assignment methods produce codes that allow one to maximize the operating speed of the circuit and are applicable to completely or incompletely specified sequential machines.Keywords
This publication has 5 references indexed in Scilit:
- A Reduction Technique for Prime Implicant TablesIEEE Transactions on Electronic Computers, 1965
- A State Variable Assignment Method for Asynchronous Sequential Switching CircuitsJournal of the ACM, 1963
- Encoding of incompletely specified Boolean matricesPublished by Association for Computing Machinery (ACM) ,1960
- Minimizing the Number of States in Incompletely Specified Sequential Switching FunctionsIEEE Transactions on Electronic Computers, 1959
- The synthesis of sequential switching circuitsJournal of the Franklin Institute, 1954