On the verification of state-coding in STGs
- 1 January 1992
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
Theoretical foundations and a verification procedure based on the transitive lock relation are developed to solve the state coding problem wholly on the signal transition graph (STG) domain for STGs containing multicycle signals and conditional behaviors. The problem considered is realizable state coding, which is a more relaxed requirement than unique state coding. For STGs with multicycle signals, single-cycle transformation is proposed to transform the problem into one with single-cycle signals. For STGs with conditional behaviors, two operations, branch reversing and self-loop unfolding, are proposed to significantly simplify the verification process. The proposed algorithmic approaches have been shown to be successful on over 30 examples from academia and industry.Keywords
This publication has 5 references indexed in Scilit:
- Synthesis of hazard-free asynchronous circuits from graphical specificationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Optimized synthesis of asynchronous control circuits from graph-theoretic specificationsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- On the verification of state-coding in STGsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1992
- Automatic synthesis of asynchronous circuitsPublished by Association for Computing Machinery (ACM) ,1991
- Automatic synthesis of asynchronous circuits from high-level specificationsIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989