Finite-element determination of interconnect track overheating

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Abstract
In the design of new processes for VLSI, track overheating as a result of resistive losses must be well characterised to avoid problems such as electromigration. The finite-element analysis presented here demonstrates serious shortcomings in the usual thermal resistor model for estimating overheating. For a minimum feature size of 1μm, track overheating may be 5 times greater than estimated when designs are realised.

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