Membrane probe card technology (the future for higher performance wafer test)
- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 601-607
- https://doi.org/10.1109/test.1988.207842
Abstract
A probe card technology is described that addresses the needs of testing VLSI devices at the wafer level. This technology offers the ability to test high-pin count devices at operating speed with the same performance as obtained in package test. The design and performance characteristics of two implementations are summarized and the results of several applications are reviewed Author(s) Leslie, B. Hewlett Packard Co., Palo Alto, CA, USA Matta, F.Keywords
This publication has 0 references indexed in Scilit: