Automatic test pattern generation for industrial circuits with restrictors
- 31 October 1995
- journal article
- Published by Elsevier in Microelectronics Journal
- Vol. 26 (7) , 635-645
- https://doi.org/10.1016/0026-2692(95)00005-3
Abstract
No abstract availableKeywords
This publication has 2 references indexed in Scilit:
- On the Acceleration of Test Generation AlgorithmsIEEE Transactions on Computers, 1983
- An Implicit Enumeration Algorithm to Generate Tests for Combinational Logic CircuitsIEEE Transactions on Computers, 1981