iCOACH: a circuit optimization aid for CMOS high-performance circuits

This publication has 14 references indexed in Scilit:

• Optimization-based transistor sizing
  IEEE Journal of Solid-State Circuits, 1988
• MIS: A Multiple-Level Logic Optimization System
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
• An Efficient Approach to Gate Matrix Layout
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
• Aesop: a tool for automated transistor sizing
  Published by Association for Computing Machinery (ACM) ,1987
• Delay optimization of combinational static CMOS logic
  Published by Association for Computing Machinery (ACM) ,1987
• A New Symbolic Channel Router: YACR2
  IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1985
• The TimberWolf placement and routing package
  IEEE Journal of Solid-State Circuits, 1985
• LSS: A system for production logic synthesis
  IBM Journal of Research and Development, 1984
• Pert as an Aid to Logic Design
  IBM Journal of Research and Development, 1966
• An Automatic Method for Finding the Greatest or Least Value of a Function
  The Computer Journal, 1960