Design of a divide-by-N asynchronous odd-number counter with 50/50 duty cycle

1 January 1974

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in Proceedings of the IEEE

Vol. 62 (9) , 1278-1279
https://doi.org/10.1109/proc.1974.9606

Abstract

Methods of designing an asynchronous divide-by-N odd-number counter with 50/50 duty-cycle output are presented. The counter can be implemented by an EXCLUSIVE OR gate associated with a divide-by-(N + 1)/2 counter and a flip-flop, or by the combination of EXCLUSIVE OR gates and flip-flops.

Keywords

COUNTING CIRCUITS
CLOCKS
FLIP-FLOPS
FREQUENCY CONVERSION
SIGNAL GENERATORS
DESIGN METHODOLOGY
OSCILLATORS
DIGITAL SYSTEMS
PROPAGATION DELAY

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