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An application of cellular logic for high speed decoding of minimum-redundancy codes
Home
Publications
An application of cellular logic for high speed decoding of minimum-redundancy codes
An application of cellular logic for high speed decoding of minimum-redundancy codes
KO
K. Ohmori
K. Ohmori
SN
S. Naito
S. Naito
TN
T. Nanya
T. Nanya
KN
K. Nezu
K. Nezu
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1 January 1972
conference paper
Published by
Association for Computing Machinery (ACM)
p.
345-351
https://doi.org/10.1145/1479992.1480040
Abstract
No abstract available
Cited
Cited by 1 article
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