High density CMOS processing for a 16K-bit RAM

Abstract
A high density CMOS process has been designed, characterized and optimized for a 16K-bit static RAM application with the standard six-transistor cell configuration. Electron beam lithography was applied for the mask making, and various dry etching technique was introduced for a finer pattern formation including a contact window cut. Fabrication and characteristics of the device elements and a new 16K(2K × 8) bit CMOS RAM are described.