Time Loss Through Gating of Asynchronous Logic Signal Pulses
- 1 February 1966
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electronic Computers
- Vol. EC-15 (1) , 108-111
- https://doi.org/10.1109/pgec.1966.264407
Abstract
The gating of asynchronous signals causes logical errors. It is possible to reduce the frequency of these errors, but the price paid is a severe loss of time and extra cost in hardware.Keywords
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