Self-timed boundary-scan cells for multi-chip module test
- 24 October 2013
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- No. 10930167,p. 92-97
- https://doi.org/10.1109/vtest.1998.670854
Abstract
This communication presents a self-timed scan-path architecture, to be used in a conventional synchronous environment, and with basic application in digital testing in a Smart-Substrate MCM. Three different self-timed asynchronous scan cells are proposed (Sense, Drive and Drive and Sense cells) that can be connected to form a self-timed scan-path. The main advantage is that no global test clock is needed, avoiding clock skew and synchronization faults in test mode.Keywords
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