Demonstration of an electronic photonic integrated circuit in a commercial scaled bulk CMOS process

Abstract

We demonstrate the first photonic chip designed in a commercial bulk CMOS process (65 nm node) using standard process layers combined with scalable post-processing, enabling dense photonic integration with high-performance microprocessor electronics.

Keywords

PHOTONIC INTEGRATED CIRCUITS
CMOS PROCESS
OPTICAL WAVEGUIDES
TESTING
OPTICAL RING RESONATORS
OPTICAL FILTERS
FILTER BANK
SILICON
INTEGRATED CIRCUIT INTERCONNECTIONS
OPTICAL LOSSES

This publication has 2 references indexed in Scilit:

Fully Integrated VLSI CMOS and Photonics "CMOS Photonics"
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2007
Ultracompact optical buffers on a silicon chip
Nature Photonics, 2006