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A High-Speed Carry Circuit for Binary Adders
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A High-Speed Carry Circuit for Binary Adders
A High-Speed Carry Circuit for Binary Adders
CW
C.W. Weller
C.W. Weller
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1 August 1969
journal article
Published by
Institute of Electrical and Electronics Engineers (IEEE)
in
IEEE Transactions on Computers
Vol. C-18
(8)
,
728-732
https://doi.org/10.1109/T-C.1969.222755
Abstract
A high-speed carry circuit for binary parallel adders is described. The circuit consists of emitter followers connected in series to form a transmission path for carry signals obtained from the individual bits of the adder.
Keywords
HIGH SPEED
BINARY
PARALLEL ADDERS
SPEED CARRY
INDIVIDUAL BITS
SIGNALS OBTAINED
CARRY CIRCUIT
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