Exponential lower bounds for restricted monotone circuits
- 1 January 1983
- proceedings article
- Published by Association for Computing Machinery (ACM)
- p. 110-117
- https://doi.org/10.1145/800061.808739
Abstract
In this paper we consider monotone Boolean circuits with three alternations, in the order “or”, “and”, “or.” Whenever the number of alternations is limited to a fixed constant the formula and circuit size measures are polynomially related to each other. We shall therefore refer to this measure interchangeably as &Sgr;&pgr;&Sgr;-formula size or &Sgr;&pgr;&Sgr;-circuit size. We shall prove that any such circuit or formula for detecting the existence of cliques in an N-node graph has at least 2&Ohgr;(N&egr;) gates for some &egr; 0 independent of N.Keywords
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