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SIMP (Single Instruction stream/Multiple instruction Pipelining): a novel high-speed single-processor architecture
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Publications
SIMP (Single Instruction stream/Multiple instruction Pipelining): a novel high-speed single-processor architecture
SIMP (Single Instruction stream/Multiple instruction Pipelining): a novel high-speed single-processor architecture
KM
K. Murakami
K. Murakami
NI
N. Irie
N. Irie
ST
S. Tomita
S. Tomita
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1 January 1989
conference paper
Published by
Association for Computing Machinery (ACM)
https://doi.org/10.1145/74925.74935
Abstract
No abstract available
Cited
Cited by 14 articles
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