Full duplex speech and data coder: algorithm enhancement test bed

6 January 2003

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 1409-1413
https://doi.org/10.1109/glocom.1988.26058

Abstract

The authors present a bit-for-bit compatible full-duplex realization of the CCITT ADPCM (adaptive differential pulse code modulation) transcoder algorithm (G.721) and a functional real-time testbed for algorithm modifications. The coder is designed around a single TMS320C25 microprocessor. They have built peripheral processing circuitry to decrease computation time and facilitate testing. The base and modified algorithms (for voice and data coding) can be selectively compared. In particular, the authors evaluate a key modification for prevention of transition errors which occur in certain FSK (frequency shift-keying) modems.

Keywords

This publication has 2 references indexed in Scilit:

Ensuring predictor tracking in ADPCM speech coders under noisy transmission conditions
IEEE Journal on Selected Areas in Communications, 1988
Efficient microprocessor-based tandemable 32 kbit/s ADPCM/PCM transcoder
IEEE Transactions on Acoustics, Speech, and Signal Processing, 1987