Efficient and effective placement for very large circuits
- 1 March 1995
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Vol. 14 (3) , 349-359
- https://doi.org/10.1109/43.365125
Abstract
No abstract availableThis publication has 14 references indexed in Scilit:
- Clustering based simulated annealing for standard cell placementPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- Performance of a new annealing schedulePublished by Institute of Electrical and Electronics Engineers (IEEE) ,2003
- A new generalized row-based global routerPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- RITUAL: a performance driven placement algorithm for small cell ICsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- New algorithms for the placement and routing of macro cellsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- Finding clusters in VLSI circuitsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,2002
- A new approach to effective circuit clusteringPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1992
- A probabilistic multicommodity-flow solution to circuit clustering problemsPublished by Institute of Electrical and Electronics Engineers (IEEE) ,1992
- Analytical placementPublished by Association for Computing Machinery (ACM) ,1991
- VLSI Placement and Global Routing Using Simulated AnnealingPublished by Springer Nature ,1988