Evaluating associativity in CPU caches
- 1 December 1989
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Computers
- Vol. 38 (12) , 1612-1630
- https://doi.org/10.1109/12.40842
Abstract
The authors present new and efficient algorithms for simulating alternative direct-mapped and set-associative caches and use them to quantify the effect of limited associativity on the cache miss ratio. They introduce an algorithm, forest simulation, for simulating alternative direct-mapped caches and generalize one, which they call all-associativity simulation, for simulating alternative direct-mapped, set-associative, and fully-associative caches. The authors find that although all-associativity simulation is theoretically less efficient than forest simulation or stack simulation (a commonly used simulation algorithm), in practice it is not much slower and allows the simulation of many more caches with a single pass through an address trace. The authors also provide data and insight into how varying associatively affects the miss ratio.Keywords
This publication has 26 references indexed in Scilit:
- A case for direct-mapped cachesComputer, 1988
- Aspects of Cache Memory and Instruction Buffer PerformancePublished by Defense Technical Information Center (DTIC) ,1987
- Line (Block) Size Choice for CPU Cache MemoriesIEEE Transactions on Computers, 1987
- Instruction Cache Replacement Policies and OrganizationsIEEE Transactions on Computers, 1985
- Cache Performance in the VAX-11/780ACM Transactions on Computer Systems, 1983
- Cold-start vs. warm-start miss ratiosCommunications of the ACM, 1978
- Cache memories for PDP-11 family computersPublished by Association for Computing Machinery (ACM) ,1976
- Cache-based Computer SystemsComputer, 1973
- Evaluation techniques for storage hierarchiesIBM Systems Journal, 1970
- Structural aspects of the System/360 Model 85, II: The cacheIBM Systems Journal, 1968