Soft Error Susceptibility of CMOS RAMS: Dependence upon Power Supply Voltage

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Abstract
Two types of a delidded CMOS 1024 × 1 RAM (Harris HM 6508-RH and Sandia TA597) have been tested for susceptibility to soft bit errors caused by 150-MeV krypton ions. Bit-error susceptibility was measured as a function of bias voltage and ion beam angle with respect to the chip-face normal. Comparison of measured bit-error rates and thresholds with those computed by use of a simple device model and manufacturer-supplied data shows good agreement in some respects while raising questions in others. In the case of the HM 6508-RH RAMs, measured values of critical charge of 1 pC and 2 pC at 5V and 7V, respectively, indicate that the devices can be expected to 4show bit-error rates in space of approximately 1 × 10-4 per chip per day at 5V bias and 1 × 10-5 per chip per day at 7V bias.