InP JFETs by shallow Zn diffusion
- 1 January 1983
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
This paper reports on the fabrication and performance of 2 µm gate length, Zn-diffused, InP junction field-effect transistors (JFETs). Device fabrication uses a semi-sealed, selective diffusion technique to form a shallow p+gate region. The measured transconductance of the Zn-diffused JFETs ranged from 80-100 mS/mm. At 4.5 GHz, maximum available gains up to 7.2 dB were observed. With a 9.0 V drain bias, scaled output powers up to .52 W/mm were achieved.Keywords
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