The loophole in logic test: mixed signal ASIC
- 6 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 16.4/1-16.4/5
- https://doi.org/10.1109/cicc.1988.20880
Abstract
The author surveys test-related loopholes that could limit mixed signals. All the loopholes are related to one or more of three fundamental environmental characteristics. First, mixed-signal ASIC (application-specific integrated circuit) components lack the controllability and observability seen at old component/card test levels. Second, there is much closer interaction between the logic and analog portions of a design. Third, design and product life cycles are being compressed to the point where existing card and component test methodologies and processes no longer meet requirements. He shows that the key development that will lead to significant improvements in mixed signal test methodologies is the most recent generation of mixed-signal, digital signal processor (DSP)-based tester/work stations. Particularly important is computer-automated design software that these systems provide, which may establish a better environment for design-for-test and test generation development.Keywords
This publication has 1 reference indexed in Scilit:
- Testing Mixed-Signal DevicesIEEE Design & Test of Computers, 1987