An integrated 12 bit analog front end for CCD based image processing applications

23 December 2002

conference paper
Published by Institute of Electrical and Electronics Engineers (IEEE)

p. 96-97
https://doi.org/10.1109/vlsic.1996.507728

Abstract

An IC has been developed that integrates all of the analog and digital signal processing functions of a color flatbed document scanner analog front end (AFE) into a single chip. The chip contains a high linearity 6 MHz 12 Bit ADC, triple correlated double sampler (CDS), SHA, PGA functions as well as fixed function DSP circuitry to perform pixel rate digital offset and gain correction and has been fabricated in a .6 /spl mu/m DPDM CMOS process.

Keywords

CHARGE COUPLED DEVICES
DIGITAL SIGNAL PROCESSING CHIPS
ANALOG INTEGRATED CIRCUITS
DIGITAL INTEGRATED CIRCUITS
COLOR
LINEARITY
ELECTRONICS PACKAGING
PERFORMANCE GAIN
CMOS PROCESS

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