Multiple Coincidence Circuit

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Abstract
A general purpose “fast‐slow” multiple coincidence circuit is described. Three independent sets of fast coincidence conditions and three independent sets of slow coincidence conditions, involving up to five input signals, can be imposed simultaneously using a plug board and a set of patch cords. Coincidence pulse timing is accomplished with the aid of a unique discriminator circuit which can be used either to detect an early point on the rise of the input signals or the time of input signal zero transition. The discriminator bias can be varied over a wide range without affecting the circuit recovery time. The ``fast'' coincidence resolving time can be adjusted from 0 to 0.18 μsec, and signal delays can be adjusted over a 0.3‐μsec range. The ``slow'' coincidence resolving time is fixed at approximately 2 μsec. Semiconductor active elements have been used exclusively.

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