Lambda diodes utilizing an enhancement-depletion CMOS/SOS process

1 June 1977

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 24 (6) , 751-756
https://doi.org/10.1109/t-ed.1977.18815

Abstract

A process is described for the simultaneous fabrication of enhancement and depletion mode, n-, and p-channel MOS/ SOS transistors necessitating six mask levels through metallization. The depletion-mode devices are actually deep depletion devices and an analysis of these structures when operated in a surface accumulation mode is presented. The enhancement devices are shown to have normal device characteristics with threshold voltages of less than 1.0 V. The depletion-mode devices also have normal characteristics with pinchoff values less than 1.0 V. Lambda diodes were fabricated from the depletion-mode devices which had peak current values of 5 µA at 0.5 V. In addition, a 16-bit memory array was fabricated comprised of all these structures which had an access time of 3 µs at 5.0 V.

Keywords

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