Performance and overhead in a hybrid reconfigurable computer

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Abstract
In this paper, we overview general hardware architecture and programming model of SRC-6E/spl trade/ reconfigurable computers, and compare the performance of the SRC-6E machine with the Intel/spl reg/ Pentium IV/spl trade/. SRC-6E execution time measurements have been performed using three different approaches. In the first approach, the entire end-to-end execution time is taken into account. In the second approach, the configuration time of FPGA have been omitted. In the third approach both configuration and data transfer overheads have been omitted. All measurements have been done for different numbers of data blocks. The results show that the SRC-6E can outperform a general-purpose microprocessor for computationally intensive algorithms by a factor of over 1500. However, overhead due to configuration and data transfer must be properly dealt with by the application or the system's run-time environment to achieve the full throughput potential. Some techniques are suggested to minimize the influence of the configuration time and maximize the overall end-to-end system performance.

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