Rankings
Publications
Search Publications
Cited-By Search
Sources
Publishers
Scholars
Scholars
Top Cited Scholars
Organizations
About
Login
Register
Home
Publications
A 40ns junction-shorting PROM
Home
Publications
A 40ns junction-shorting PROM
A 40ns junction-shorting PROM
TF
T. Fukushima
T. Fukushima
KU
K. Ueno
K. Ueno
YM
Y. Matsuzaki
Y. Matsuzaki
KT
K. Tanaka
K. Tanaka
Publisher Website
Google Scholar
Add to Library
Cite
Download
Share
Download
1 January 1983
conference paper
Published by
Institute of Electrical and Electronics Engineers (IEEE)
p.
172-173
https://doi.org/10.1109/isscc.1983.1156511
Abstract
An 8K×8b junction-shorting PROM using a selective power-switching circuit in dual stage decoders will be detailed. Shallow V-groove isolation and wafer stepper process technologies resulted in a 7.14mm × 5.28mm chip with a 168μ2cell size.
Keywords
PROM
DECODING
INVERTERS
MULTIPLEXING
ALUMINUM
DRIVER CIRCUITS
VOLTAGE
DIODES
TEMPERATURE
CURRENT SUPPLIES
Related articles
Cited
All Articles
Open Access
Scroll to top