Low-voltage alterable EAROM cells with nitride-barrier avalanche-injection MIS (NAMIS)

1 June 1979

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Electron Devices

Vol. 26 (6) , 906-913
https://doi.org/10.1109/t-ed.1979.19517

Abstract

Design and characteristics of NAMIS-EAROM cells alterable with voltages of about 10 V are demonstrated. The NAMIS cell employs a very thin silicon nitride film grown by direct thermal nitridation of a silicon substrate as the first insulating layer in a stacked-gate structure. Carrier injection into a floating gate is greatly enhanced due to low energy-barrier heights of silicon nitride. Further, a device structure suitable for low-voltage write/erase is presented. Writing is performed by using a single pulse of 10 V, 1 ms. Erasing is achieved by pulses of -5 and 10 V, 1 ms. Repetition of write/erase cycling is possible more than 10⁵times. Memory retention is expected to be much longer than 10 years at 125°C. The nonvolatility in the NAMIS cell is compatible with low-voltage operation, write/erase cycling, and read capacity over conventional FAMOS-type or MNOS-type memories.

Keywords

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