A Comparative Study of Performance of AES Final Candidates Using FPGAs

This publication has 5 references indexed in Scilit:

• An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists
  IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2001
• The Block Cipher BKSQ
  Published by Springer Nature ,2000
• Efficiency testing of ANSI C implementations of round 1 candidate algorithms for the advanced encryption standard
  Published by National Institute of Standards and Technology (NIST) ,1999
• FPGA and CPLD architectures: a tutorial
  IEEE Design & Test of Computers, 1996
• Architecture of field-programmable gate arrays
  Proceedings of the IEEE, 1993