Multi-level synthesis on PALs
- 4 December 2002
- proceedings article
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 542-546
- https://doi.org/10.1109/edac.1990.136706
Abstract
No abstract availableThis publication has 5 references indexed in Scilit:
- An algorithm for multiple output minimizationIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1989
- ASYL: A Rule-Based System for Controller SynthesisIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 1987
- Factoring logic functionsIBM Journal of Research and Development, 1987
- PALMINI---fast Boolean minimizer for personal computersPublished by Association for Computing Machinery (ACM) ,1987
- Logic Minimization Algorithms for VLSI SynthesisPublished by Springer Nature ,1984