CATHEDRAL-II—a computer-aided synthesis system for digital signal processing VLSI systems

Abstract
This paper describes the concepts and the status of the CATHEDRAL-II silicon compiler for digital signal processing systems. It is shown that efficient layout synthesis is possible, starting from a very high-level behavioural description of a system, owing to the careful definition of a target architectural design style and an application domain. An overview is presented of the different synthesis tools which have been or are being developed, both for architectural synthesis and optimisation, and for module and layout generation. With the underlying design methodology, the world of silicon design will become accessible to system engineers.

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