An analog MOS implementation of the synaptic weights for feedback neural nets
- 13 January 2003
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- p. 1223-1226
- https://doi.org/10.1109/iscas.1989.100575
Abstract
The authors introduce a MOS-based realization of the synaptic weight problem for neural nets. The realization is achieved via an adaptation of continuous-time analog multipliers where the weights are assigned as positive or negative voltage levels. The neural network is then realized by double inverters interconnected through the introduced analog multipliers. Using only a single operational amplifier, each analog multiplier is capable of realizing the scalar product Sigma T/sub ij/V/sub j/, j=1, . . ., n, and i is fixed, where V/sub j/; is the output neuron and T/sub ij/ is the assigned positive or negative weight. The authors demonstrate the functionality of the feedback neural networks with MOS-based multipliers using a two-neuron example.<>Keywords
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