Conceptual design, performance analysis and results of the high resolution real-time processor of the DLR airborne SAR system
- 24 August 2005
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
- Vol. 2, 912-914
- https://doi.org/10.1109/igarss.1994.399298
Abstract
The paper presents the conceptual design, performance analysis and results of the high resolution real-time processor integrated in the experimental airborne SAR-system of the DLR. A real-time subaperture (RTS) approach, which is suitable for airborne real-time SAR processing, was chosen for the hardware implementation. A new approach for high squint SAR processing is adopted, which consists basically of performing a one-dimensional azimuth compression followed by a two-dimensional convolution with a correction function. The main advantages of this approach are the simple hardware implementation, reduced computational and memory requirements and efficient time-domain correction of the range migration. Dedicated on-board hardware, which consists of high speed digital signal processors, programmable logic devices and other integrated circuits, was developed at DLR. The on-board hardware has been successfully tested. The results of the first flight tests in the area of Oberpfaffenhofen (Germany) are shown.Keywords
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