Random testing of integrated circuits
- 1 March 1981
- journal article
- Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Transactions on Instrumentation and Measurement
- Vol. IM-30 (1) , 20-25
- https://doi.org/10.1109/TIM.1981.6312432
Abstract
The paper concerns fault detection by applying a random input sequence simultaneously to a circuit under test and to a reference circuit. The objective is to determine the length of the input sequence to be applied, to obtain a given detection quality (detection probability). The paper gives a summary of the results which have been obtained for combined circuits, memories, SSI, and MSI sequential circuits.Keywords
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