A model for conduction in polycrystalline silicon—Part I: Theory

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Abstract
A new phenomenological model for the electrical conduction in polycrystalline silicon is developed. The combined mechanisms of dopant segregation, carrier trapping, and carrier reflection at grain boundaries are proposed to explain the electrical conduction in polycrystalline silicon. The grain boundaries are assumed to behave as an intrinsic wide-band-gap semiconductor forming a heterojunction with the grains. Thermionic emission over the potential barriers created within the grains due to carrier trapping at the grain boundaries and then tunneling through the grain boundaries is proposed as the carrier transport mechanism. A generalized current-voltage relationship is developed which shows that the electrical properties of polycrystalline silicon depend on the properties of the grain boundaries.