On optimal structure and geometry of high-speed integrated photodiodes in a standard cmos technology

1 December 2003

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

Vol. 1, 87
https://doi.org/10.1109/cleopr.2003.1274557

Abstract

Analyses of the influence of different geometries (layouts) and structures of high-speed CMOS photodiodes on their intrinsic (physical) and electrical bandwidths are presented. Three photodiode structures are studied: nwell/p-substrate, p+/nwell/p-substrate and p+/nwell. According to the author's knowledge, this is a first time that the influence of various structures and geometries (layouts) of CMOS photodiodes on their bandwidth is analytically analysed

Keywords

OPTIMAL STRUCTURE
SPEED INTEGRATED
PHOTODIODES
STANDARD CMOS
STRUCTURE AND GEOMETRY

This publication has 1 reference indexed in Scilit:

Calculation of the current response of the spatially modulated light CMOS detector
IEEE Transactions on Electron Devices, 2001