A half-micron SRAM cell using a double-gated self-aligned polysilicon PMOS thin film transistor (TFT) load

Publisher Website

1 January 1990

proceedings article
Published by Institute of Electrical and Electronics Engineers (IEEE)

https://doi.org/10.1109/vlsit.1990.110987

Abstract

No abstract available

Keywords

This publication has 1 reference indexed in Scilit:

Characteristics and Three-Dimensional Integration of MOSFET's in Small-Grain LPCVD Polycrystalline Silicon
IEEE Journal of Solid-State Circuits, 1985