Random Testing of Memories

This publication has 4 references indexed in Scilit:

• The Error Latency of a Fault in a Sequential Digital Circuit
  IEEE Transactions on Computers, 1976
• About Random Fault Detection of Combinational Networks
  IEEE Transactions on Computers, 1976
• Analysis of Logic Circuits with Faults Using Input Signal Probabilities
  IEEE Transactions on Computers, 1975
• Failure Analysis of Memory Organization for Utilization in a Self-Repair Memory System
  IEEE Transactions on Reliability, 1971