Potential and modelling of 1 µm 1 GHz SOICMOS OTAs

24 April 1997

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 33 (9) , 774-775
https://doi.org/10.1049/el:19970517

Abstract

High-frequency device models, design guidelines and frequency limitations are presented, as well as layout and technology improvements to boost the transconductance at high frequency and to reduce the substrate capacitances. Implementations of one-stage and folded-cascode op-amps have been realised to validate the design method.

Keywords

HIGH-FREQUENCY DEVICE MODELS
SOI CMOS OTA
ONE-STAGE OP-AMPS
DESIGN METHOD
1 GHZ
FOLDED-CASCODE OP-AMPS
SUBSTRATE CAPACITANCES
DESIGN GUIDELINES
FREQUENCY LIMITATIONS
1 MICRON

This publication has 2 references indexed in Scilit:

Design of SOI CMOS operational amplifiers for applications up to 300°C
IEEE Journal of Solid-State Circuits, 1996
Microwave wideband amplifiers in bulk-CMOS and CMOS/SIMOX technologies
Published by Institute of Electrical and Electronics Engineers (IEEE) ,1995