Effect of deposition temperature on LPCVD polysilicon

19 June 1986

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 22 (13) , 716-718
https://doi.org/10.1049/el:19860490

Abstract

The electrical properties of LPCVD silicon are shown to be optimised for microelectronic applications by depositing the films as an amorphous layer and annealing to yield a polycrystalline form. The film resistivity is lowered and the piezoresistive coefficient raised by this technique. These improvements are explained by a simple theory which incorporates trap density and grain size effects and also allows the temperature coefficients of resistance and gauge factor to be calculated.

Keywords

FILM RESISTIVITY
MICROELECTRONIC APPLICATIONS
TRAP DENSITY
ANNEALING
LPCVD
AMORPHOUS LAYER
GRAIN SIZE
DEPOSITION TEMPERATURE
PIEZORESISTIVE COEFFICIENT
POLYSILICON
SEMICONDUCTOR
GAUGE FACTOR
TEMPERATURE COEFFICIENTS OF RESISTANCE
POLYCRYSTALLINE SI
ELECTRICAL PROPERTIES

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