V groove m.o.s. transistor technology
- 20 September 1973
- journal article
- Published by Institution of Engineering and Technology (IET) in Electronics Letters
- Vol. 9 (19) , 457-458
- https://doi.org/10.1049/el:19730333
Abstract
An m.o.s. transistor structure in which the channel is defined by preferential etching of the silicon is described. The fabrication technology involves either a 3- or 4-mask process, and results in very-short-channel devices, using noncritical alignment tolerances. Experimental results obtained on the fabricated devices are presented, and possible uses of the technology are described.Keywords
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