Methodology for Compiler Generated Silicon Structures
- 1 January 1984
- conference paper
- Published by Institute of Electrical and Electronics Engineers (IEEE)
Abstract
A unique cell compiler is described which uses a combination of high level or systems level parameters to define and build complex cells such as RAMs, ROMs and PLAs. The techniques include specialized macros residing in VIP (VLSI Implementation Program), a powerful procedural design language, and predefined component cells used to construct multiple variations of the same circuit.Keywords
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