Effect of “bamboo” grain boundaries on the maximum electromigration-induced stress in microelectronic interconnect lines

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Abstract
A model which describes the steady-state mechanical stresses resulting from electromigration in microelectronic interconnect lines is presented. This model is valid when sidewall and grain boundary interface diffusion are the dominant transport paths, and accounts for the two-dimensional microstructure present in such lines. By applying the model to simulated line microstructures, we find that bamboo grain boundaries may substantially increase the maximum electromigration stress. Furthermore, microstructural simulations on bounded interconnect segments show that variations in grain size may lead to a large scatter in the maximum stress, particularly as line length decreases.