The Alpha AXP architecture and 21064 processor

1 June 1993

journal article
Published by Institute of Electrical and Electronics Engineers (IEEE) in IEEE Micro

Vol. 13 (3) , 36-47
https://doi.org/10.1109/40.216747

Abstract

The Alpha AXP 64-b architecture, which forms the basis for a series of high-performance computer systems, is described. The implementation of this architecture in the 21064 microprocessor is discussed. This 1.4-cm*1.7-cm CMOS chip incorporates 1.68 million transistors using a 0.75- mu m, three-metal process. Performance measurement results for a variety of commonly used benchmarks under both OpenVMS AXP V1 and DEC OSF/1 V1.2 are presented.

Keywords

This publication has 5 references indexed in Scilit:

A 50 MIPS (peak) 32/64 b microprocessor
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
A 200 MHz 64 b dual-issue CMOS microprocessor
Published by Institute of Electrical and Electronics Engineers (IEEE) ,2003
Binary translation
Communications of the ACM, 1993
Alpha AXP architecture
Communications of the ACM, 1993
A 200-MHz 64-b dual-issue CMOS microprocessor
IEEE Journal of Solid-State Circuits, 1992