Design of reprogrammable FPLA

25 May 1989

journal article
Published by Institution of Engineering and Technology (IET) in Electronics Letters

Vol. 25 (11) , 715-716
https://doi.org/10.1049/el:19890484

Abstract

A new design scheme for field programmable logic arrays is presented. The proposed design uses transistors with double polysilicon gates instead of fuses. The design is highly useful since the PLA can be programmed again and again without any constraint. The proposed design offers the concept of reusable hardware to implement combinational circuits.

Keywords

NMOS TECHNOLOGY
COMBINATIONAL CIRCUITS
REUSABLE HARDWARE
FIELD PROGRAMMABLE LOGIC ARRAYS
DESIGN SCHEME
REPROGRAMMABLE FPLA
TRANSISTORS
DOUBLE POLYSILICON GATES

This publication has 0 references indexed in Scilit: